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ds06-70104-3e fujitsu semiconductor data sheet semicustom bi-cmos astro master iv speci?ation (for pll frequency synthesizers) MB1570 series n description the astro master iv is a master-slice type semi-custom lsi ideal for use in high-frequency front-end circuits in vco, ampli?r, mixer and i/q modulator devices. the MB1570 series features an analog circuit unit that is a more highly integrated version of the astro master i series. the pll, prescaler and high-frequency analog circuits can be designed to users speci?ations using fujitsus standard macro cells as well as customized macro cells. this lsi series uses fujitsus latest process technology for power-saving operation and master-slice semi- custom design to reduce lead times and lower costs. in addition, the ultra-compact ?t package helps maintain circuit con?entiality, and contributes to lighter, more compact design by reducing the number of components. the astro master iv is ideal for high-frequency applications, particularly mobile communication devices operating on digital speci?ations such as pcn, dect, phs and so on. astro: advanced semi-custom technology of super pll with rf system on lsi. n features pll circuits can be customized for operating frequency, logical circuits, etc. high frequency analog circuits with adjustable resistance levels (continued) n packages (fpt-48p-m05) 48-pin plastic lqfp 64-pin plastic lqfp (fpt-64p-m03)
2 MB1570 series (continued) high speed operating capacity to 3.0 ghz on-chip low-current consumption and power-saving circuits on-chip high-speed lockup function supply voltage: 2.7 v to 3.3 v (minimum operating voltage to 2.0 v min.) development time (standard): approx. 10 weeks n lineup series prescaler pll analog circuits operating frequency package remarks lqfp MB1570 2 circuits 2 circuits 6 circuits 3.0 ghz 48 64 for dual frequency synthesizers
3 MB1570 series n chip layout MB1570 series analog cell prescaler analog analog analog analog analog analog pll pll buffer buffer shifter shifter prescaler charge pump charge pump capacitor array (15 pf ?) resistor array transistor array capacitor array (3 pf ?) sub-bias unit (2 pf ?) capacitor array (3 pf ?) sub-bias unit transistor array capacitor array resistor array resistor array resistor array resistor array
4 MB1570 series n macro cell descriptions 1. prescaler divides the reference frequency by any given value and outputs the resulting frequency. choice of two-modulus or ?ed output mode. 2. pll phase comparator the phase comparator has a phase detection range of ? p to +2 p , and is designed to eliminate blind spots in phase comparison by output of a margin-of-error signal to the charge pump even when the phase difference is zero. phase comparator characteristics can also be tuned to the polarity of vco. counters the divide ratios of the comparator-side counter and reference-side counter can be either programmable or ?ed. charge pump the ? level output voltage from the charge pump is determined by power supply voltage. charge pump characteristics for the sending and receiving systems can be optimized for each speci? application. for example, when fm modulation is applied directly to the vco signal, charge pump characteristics can be adjusted for lower speeds in order to reduce the sensitivity of the synthesizer loop so that output does not track the modulation. analog switch when switching frequencies, the analog switch can be used to switch the capacitance of the low pass ?ter, to reduce the time constant in the ?ter and the load on the charge pump. this enables higher lock-up speed. switch control is synchronous with the le signal, to that the analog switch is on when the le signal is ?igh? high speed lock-up circuit this circuit is specially designed for faster lock-up speeds. intermittent operation control circuit this on-chip power-saving function reduces circuit current ?w in standby status, enabling devices to operate with less power demand. a special circuit is built in to prevent excessive error signal from increasing lock-up delay during the transition from power-saving mode to operating mode. list of standard macro cells crystal oscillator input frequency: up to 32 mhz standby mode current demand: 100 m a type v cc i cc operating frequency prescaler divide ratio comparator counter divide ratio (m) swallow counter divide ratio (a) reference counter divide ratio (r) pll1 3v 4 ma 1.1 ghz 64/65 16 to 2047 0 to 127 8 to 16383 pll2 6 ma 2.0 ghz
5 MB1570 series 3. high frequency analog cells mixer active type double-balanced mixer if ampli?r the if ampli?r is con?ured from a differential ampli?r plus an npn transistor using emitter-follower output from the differential ampli?r. rf ampli?r provides emitter-follower output of the output signal from the emitter-ground circuit. the rf input side can be connected to an internal bias circuit. vco con?ured from an oscillator transistor in a base-ground colpitts type oscillator circuit, plus a transistor acting as output buffer. can be connected to external devices such as varicap or resonator. orthogonal modulator an orthogonal modulator is used for if frequency modulation. in addition, a ?p-?p type 90 phase shift circuit can be included in the con?uration. note: circuit format and other details can be adjusted to meet customer requirements. n circuit operating descriptions 1. intermittent operation control circuit the intermittent operation control circuit operates the lsi circuits during communication operations and at all other times places the chip in standby status to reduce power demand. (1) circuit operation in operating mode all circuits are in operating status, and the chip performs normal pll operations. (2) circuit operation in standby mode all circuits that can be stopped without interfering with operation are shut down, and the chip goes into low- power operating mode. latch data: saves immediately preceding data shift register: data input enabled charge pump output: high impedance vco input voltage: saves voltage level stored in low-pass ?ter during the last operating mode the digital system power supply must still be applied in standby mode.
6 MB1570 series 2. phase lock detection circuit to detect phase lock condition from the ld signal pin output, the t-bit should be selected. when the phase difference is greater than tw, the ld pin will output an l level signal, and when the difference is less than tw for 3 or more cycles, the output will change to h level. the length of the tw time interval can be set in the range of 625 ns to 1250 ns by connection to the crystal oscillator. ld signal operating status 3. high speed tuning circuit the following high speed tuning circuits are available for use according to speci? applications. high speed tuning circuits for astro master iv operating status pll circuit ld output standby mode standby h operating mode un-lock l lock h function operation optimum applications analog switch circuit temporarily reduces lpf time constant at lock-up. analog portable phone devices (receiving system) turbo circuits for broad-band steps, circuit forcibly switches charge pump on/off phs devices supercharger circuit circuit increases charge pump drive capacity phs devices hypercharger circuit circuit further enhances the drive capacity of the supercharger circuit pdc, gsm etc.
7 MB1570 series n serial data 1. data bit con?uration pll operating settings are made through serial data input. the standard serial format is shown in the table below. serial data is entered msb-?st, and the data length is in the range of 22 to 37 bits. standard format for serial data 2. serial data input timing after the serail data is stored in the shift register, it can be transferred to the latch circuit by means of the le signal. bit name (abbreviation) functional description standard bit count control bit (cnt bit) selects transfer destination (sending or receiving system) 1 to 2 ld select bit (t-bit) selects ld output 1 to 2 fc bit (f-bit) switches the phase of phase comparator 1 programmable counter bit (n-bit) sets the programmable counters divide ratio 11 swallow counter bit (a-bit) sets the swallow counters divide ratio 7 reference counter bit (r-bit) fixed sets the reference counters divide ratio 1 to 2 programmable 14 (msb) cnt (lsb) serial data* 1 clock signal le t 4 * 2 t 5 * 2 t 3 * 2 t 2 * 2 t 1 * 2 *1: serial data is input, msb-?st. *2: 100 ns t 1 , t 4 300 ns t 3 800 ns t 5 1000 ns t 2 notes: data input utilizes the serial data, clock and le signals at supply voltage or lower levels shift register data is updated sequentially each time the clock signal is input. data is synchronized with the rising edge of the clock signal, and is read sequentially into the shift register, msb-?st. after lsb input, the le signal is changed from l level to h level. shift register data is transferred to the latch circuit while the le signal is at h level. each input signal pin has a schmitt trigger circuit to protect against abnormal operation due to noise.
8 MB1570 series n absolute maximum ratings * : voltage values are based on gnd = 0 v. note: permanent device damage may occur if the above absolute maximum ratings are exceeded. functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. exposure to absolute maximum rating conditions for extended periods may affect device reliability. n recommended operating conditions *1: voltage values are based on gnd = 0 v *2: operation is assured to the minimum operating voltage level of 2.0 v min. parameter symbol rating unit min. max. supply voltage* v cc ?.5 +4.0 v input voltage* v in ?.5 v cc +0.5 v output current i out ?0 10 ma storage temperature tstg ?5 +125 c parameter symbol value unit min. typ. max. supply voltage*1 v cc 2.7* 3.3 v gnd 0 v operating temperature ta ?0 +85 c
9 MB1570 series n analog circuit characteristics (continued) circuit parameter conditions value (typ.) unit vco supply voltage 3.0 v current demand 11 ma operating frequency 900 mhz c/n ratio offset frequency = 25 khz, band width = 16 khz 77 db s/n ratio bw = 0.3 to 3 khz, 3 khz/dev 44 db output power ? dbm conversion gain 6 mhz/v mixer supply voltage 3.0 v current demand 12 ma operating frequency if 800 mhz lo p lo = ?0 dbm 110 mhz rf f rf = f lo + f if 910 mhz conversion gain 6 db maximum output power ?1 dbm 1 db compression point output level ?5 dbm intercept point input level 8 dbm nf dsb measurement 12 db ampli?r supply voltage 3.0 v current demand 6 ma operating frequency 900 mhz gain f = 900 mhz (?0 dbm in) 14 db maximum output power f = 900 mhz ? dbm 1 db compression point f = 900 mhz, output level 8 dbm intercept point f = 900 mhz, 900.1 mhz, input level ?2 dbm nf f = 900 mhz 2.2 db
10 MB1570 series (continued) circuit parameter conditions value (typ.) unit orthogonal modulator supply voltage 3.0 v current demand 25 ma operating frequency lo1 p lo1 = ? dbm 500 mhz lo2 p lo2 = ? dbm 1650 mhz rf f rf = f lo2 + f lo1/2 1900 mhz output level ?4 dbm modulator precision amplitude deviation rms magnitude error 1.9 % phase deviation rms phase error 0.9 deg. vector error rms vector error 2.4 % carrier leak ?1 dbc
11 MB1570 series n analog system: basic equivalent circuits 1. mixer, if ampli?r the MB1570 series features an active-type double-balanced mixer. the lo and rf output can be connected to an internal bias circuit. the mixer output is connected through on-chip load resistor to the chips power supply, and then to the next-stage if ampli?r. the if ampli?r is con?ured from a differential ampli?r and npn transistor, and provides emitter-follower differential ampli?r output. if amplifier mixer v mix lo in lo inx rf in rf inx gnd mixer output
12 MB1570 series 2. rf ampli?r the emitter-ground circuit output signal is output as an emitter-follower signal. the rf input can be grounded to an internal bias circuit. 3. vco ampli?r the vco ampli?r is con?ured from an oscillator transistor in a base-ground colpitts type oscillator circuit, plus a transistor acting as output buffer. the vco ampli?r can be connected to external devices such as varicap or resonator. rf in v amp gnd rf output to bias c v vco gnd vco output to bias b e
13 MB1570 series n development processes each product in the astro master iv series is developed through the following processes, based on requirements and speci?ations supplied by the customer. 1. feasibility study (1) product speci?ations and development process study fujitsu conducts simulations based on documentation provided by the customer, in order to evaluate the technical and economic feasibility of each proposed design. product documentation technical documentation: functional descriptions, i/o signal descriptions, block diagrams. characteristics documentation: for prescalers, pll, vco, mixers, ampli?rs, etc. development documentation delivery schedule documentation: development schedule, division of responsibilities, etc. cost estimates: volume requirements, development costs, target prices (2) product feasibility evaluation based on the foregoing studies, fujitsu and the customer meet to evaluate feasibility. (3) development of planned speci?ations circuit functions and characteristics are studied in detail, and circuit speci?ations and testing speci?ations are developed. after speci?ations have been determined, ?al estimates of the development schedule, timing and cost, and the product price can be produced. (4) approval of provisional delivery speci?ations after fujitsu and the customer have determined the feasibility of product development, a provisional delivery schedule is agreed upon.
14 MB1570 series fujitsu customer (1) (2) (3) (4) no good good no good good product specifications, conditions for estimation functional study, cost estimation detailed product documentation preparation of documentation for development study development schedule, timing, and price estimate provisional delivery schedule approval approval
15 MB1570 series 2. lsi development (1) lsi design, prototype development based on the provisional delivery speci?ations agreed by the customer and fujitsu, chip design and prototype work begins. the standard time required for an es prototype is approximately 10 weeks from the approval of provisional delivery speci?ations. (2) es (engineering sample) evaluation both the customer and fujitsu evaluate the es prototype based on the provisional delivery speci?ations. (3) final app roval if there are no problems with the evaluation, fujitsu and the customer agree on ?al delivery speci?ations and end development, moving to the mass production stage. the standard lead time for delivery of mass production products is approximately three months. fujitsu customer (1) (2) (3) no good good lsi design es evaluation provisional delivery specifications approval delivery specifications es prototype preparation development ends, ? to mass production approximately 10 weeks approximately 3 months
16 MB1570 series n package dimensions c 1995 fujitsu limited f48013s-2c-5 0.10(.004) 0.500.08 (.0197.0031) 9.000.20(.354.008)sq 5.50 (.217) ref 8.00 (.315) nom .007 ?.001 +.003 ?0.03 +0.08 0.18 .005 ?.001 +.002 ?0.02 +0.05 0.127 .059 ?.004 +.008 ?0.10 +0.20 1.50 7.000.10(.276.004)sq "a" 0.500.20 (.020.008) 0.100.10 (.004.004) details of "a" part 0 10? 25 24 13 12 1 48 37 36 index lead no. (stand off) dimensions in mm (inches). (mounting height) *: this dimension does not include resin protraction. (fpt-48p-m05) 48-pin plastic lqfp (continued)
17 MB1570 series (continued) c 1995 fujitsu limited f64009s-2c-5 0.10(.004) .005 ?.001 +.002 ?0.02 +0.05 0.127 .059 ?.004 +.008 ?0.10 +0 . 20 1.50 "a" 0.500.20 (.020.008) details of "a" part 0 10? 33 32 17 16 1 64 49 48 index lead no. (stand off) 12.000.20(.472.008)sq 10.000.10(.394.004)sq 0.500.08 (.0197.0031) .007 ?.001 +.003 ?0.03 +0.08 0.18 11.00 7.50 (.295) ref (.433) nom 0.100.10 (.004.004) dimensions in mm (inches). (mounting height) *: this dimension does not include resin protraction. 64-pin plastic lqfp (fpt-64p-m03)
24 fujitsu limited for further information please contact: japan fujitsu limited corporate global business support division electronic devices kawasaki plant, 4-1-1, kamikodanaka nakahara-ku, kawasaki-shi kanagawa 211-88, japan tel: (044) 754-3763 fax: (044) 754-3329 north and south america fujitsu microelectronics, inc. semiconductor division 3545 north first street san jose, ca 95134-1804, u.s.a. tel: (408) 922-9000 fax: (408) 432-9044/9045 europe fujitsu mikroelektronik gmbh am siebenstein 6-10 63303 dreieich-buchschlag germany tel: (06103) 690-0 fax: (06103) 690-122 asia paci? fujitsu microelectronics asia pte. limited #05-08, 151 lorong chuan new tech park singapore 556741 tel: (65) 281-0770 fax: (65) 281-0220 f9703 fujitsu limited printed in japan all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with fujitsu sales representatives before ordering. the information and circuit diagrams in this document presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. also, fujitsu is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. fujitsu semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). caution: customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with fujitsu sales representatives before such use. the company will not be responsible for damages arising from such use without prior approval. any semiconductor devices have inherently a certain rate of failure. you must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain restrictions on export under the foreign exchange and foreign trade control law of japan, the prior authorization by japanese government should be required for export of those products from japan.

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